Analysis, Design and Implementation of 4-Bit Full Adder using FinFET

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ABSTRACT:  This paper proposes a 4-Bit full adder using FinFET at 45nm technology. The CMOS has been used widely in current technology. But scaling the CMOS will cause the short channel effects such as DIBL, GIDL, Subthreshold swing, channel length modulation, mobility degradation etc. To replace nanoscale CMOS, a multi-gate device called FinFET is proposed. FinFET has its own advantages over the CMOS such as the reduction in leakage power, operating power, leakage current and transistor gate delay, reduced threshold level and steeper subthreshold swing. The target of this paper is to reduce and calculate the leakage power of 4-Bit full adder using FinFET.

Keywords: 4-Bit full adder, FinFET, Circuit designing, Device simulation, Device Modeling, CMOS Integrated Circuit, Low Power

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Keywords: 4-Bit full adder, FinFET, Circuit designing, Device simulation, Device Modeling, CMOS Integrated Circuit, Low Power
Keywords: 4-Bit full adder, FinFET, Circuit designing, Device simulation, Device Modeling, CMOS Integrated Circuit, Low Power
Keywords: 4-Bit full adder, FinFET, Circuit designing, Device simulation, Device Modeling, CMOS Integrated Circuit, Low Power
Keywords: 4-Bit full adder, FinFET, Circuit designing, Device simulation, Device Modeling, CMOS Integrated Circuit, Low Power

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