-
IEEE Sponsored International Conference:
International Conference on Engineering and Technology
Paper Title: Performance Investigation of a Full Adder using CNFET Technology

To View the Full-text  CLICK HERE

Comments

Post a Comment

Popular posts from this blog

-
Image
IEEE International Conference: 4th International Conference on Signal Processing, Communications and Networking (ICSCN -2017) Paper Title: A Survey Paper on Modern Technologies in Fixed-Width Multiplier To View the Full-text   CLICK HERE
Read more

Review of FinFET Technology and Circuit Design Challenges

-
ABSTRACT:         Considering the difficulties in planar CMOS transistor scaling to secure an acceptable gate to channel control FinFET based multi-gate (MuGFET) devices have been proposed as a technology option for replacing the existing technology. The desirability of FinFET that its operation principle is the same as CMOS process. This permits to lengthening the gate scaling beyond the planar transistor limits, sustaining a steep subthreshold slope, better performance with bias voltage scaling and good matching due to low doping concentration in the channel. There are, still, several challenges and limitations that FinFET technology has to face to be competitive with other technology options: Fin shape, pitch, isolation, doping, crystallographic orientation and stressing as well as device parasitic, performance and patterning approaches will be discussed. To View the Full-text   CLICK HERE
Read more